Course Highlights
- Foundational Modules
Verilog HDL, Verification Methodology Overview, and Linux OS Essentials - Advanced SystemVerilog HVL + Assertions
Deep coverage of interfaces, constraints, randomisation, and assertion-based verification - Universal Verification Methodology (UVM)
Build scalable and modular testbenches using industry-standard UVM architecture - Code Coverage and Test Planning
Analyse functional and code coverage to improve verification quality - PERL Scripting for Automation
Write reusable scripts for simulation automation and report generation - EDA Tool Demonstrations
Explore tool workflows for compiling, simulating, debugging, and analysing RTL - Capstone Projects
RTL Verification Pilot Project
RISC-V RV32I Pipelined Processor UVM Verification Project - Professional Readiness
Includes Business Communication sessions to sharpen presentation and workplace interaction skills
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Skill Type
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Course Duration
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Domain
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GOI Incentive applicable
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Course Category
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Nasscom Assessment
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Placement Assistance
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Certificate Earned
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NOS Details
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Mode of Delivery
Course Details
What will you learn in Advanced VLSI Verification course?
- To enhance the skills in Advanced Verification Methodologies for complex designs
- To learn proven strategies and methodologies for robust VLSI Verification processes
- To acquire in depth knowledge about the Verification Process and IP Verification using SystemVerilog and UVM Labs
- To acquire the knowledge in Verification Process of RISC-V RV32I Processor IP
Why should you take Advanced VLSI Verification course?
- Learn and apply industry-preferred verification methodologies and scripting tools
- Gain hands-on experience in building complete verification environments from scratch
- Work on complex real-world designs like a Pipelined RISC-V Processor
- Strengthen your understanding of assertion-based and coverage-driven verification
- Build a professional edge with exposure to industry tools and communication skills
Who should take Advanced VLSI Verification course?
- Final year students, Graduates, and Early career professionals in VLSI, ECE, or Computer Engineering
- RTL designers who want to transition into or strengthen verification roles
- Verification engineers seeking to upskill with UVM, SVA, and Scripting
- Jobseekers preparing for design and verification interviews
- Educators or trainers looking to incorporate advanced verification techniques into their curriculum
Curriculum
- Verilog HDL Overview
- Verification Methodology Overview
- Linux Operating System
- Advanced Verilog
- Code Coverage
- SystemVerilog HVL
- SystemVerilog Assertions
- Universal Verification Methodology
- PERL Scripting
- Lab Exercises and Case Studies
- Reference Materials
- Lab Setup Guides
- EDA Tool Demos
- Pilot Project - RTL Verification
- RISC-V RV32I Multi stage pipelined processor RTL Verification Project
- Assessments
- Business Communication
Tools you will learn in Advanced VLSI Verification course:
- Verification Methodology Expertise
- Verifiction Process Knowledge
- Object-oriented programming concepts (OOP)
- Verification Environment Architecture
- Assertion-based Verification
- Creating reusable Testbenches
- Constraint Random Coverage Driven Verification (CRCDV)
- Functional Coverage
- RISC-V Architecture Expertise
- Electronic System Design
- Instruction Set Architecture Proficiency
- RISC-V Microcontroller Programming
- Analytical and Problem-solving Skills