Course Highlights
- This foundational course aims to investigate what a chip is, why companies would want to make them, and their evolution over the decades.
- The course begins with a brief history of the chip and then covers chip IO, binary system, arithmetic and its representation, combinational and sequential circuits, and basic Verilog constructs. We then give a detailed introduction to digital design and digital design verification.
- We end the course with a debugging challenge wherein a digital design with bugs is given and students need to find bugs and report through the portal. As the bugs are reported, updated digital design is given providing a real industry digital verification exposure.
-
Skill Type
-
Course Duration
-
Domain
-
GOI Incentive applicable
-
Course Category
-
Nasscom Assessment
-
Placement Assistance
-
Certificate Earned
-
Content Alignment Type
-
NOS Details
-
Mode of Delivery
Course Details
What will you learn in Digital Design and Verification course?
- What is chip, Why a company would develop a chip
- Digital Fundamentals
- Evolution of chip, Types of chips, Bus interface
- HDL Design flow & Synthesis
- Role of Verification, Types of verification
- Functional Verification
Why should you take Digital Design and Verification course?
- Comprehensive Foundation
- Gain a strong understanding of what a chip is, why companies develop them, and how they have evolved over time. This course lays the groundwork for a successful career in VLSI.
- Industry-Relevant Curriculum
- Learn digital fundamentals, chip architecture, HDL design flow, synthesis, verification techniques, and functional verification—essential skills for any aspiring VLSI engineer.
- Hands-On Learning
- Get practical experience with our built-in simulator, allowing you to write, test, and debug code anytime, anywhere.
- Debugging with Waveforms
- Develop real-world problem-solving skills by analyzing waveforms to debug Design Under Tests (DUT), a key task in the VLSI industry.
- Guidance from Industry Experts
- Receive mentorship from experienced professionals who provide periodic assessments, feedback, and interactive webinars to enhance your learning.
- Capstone Projects for Real-World Exposure
- Work on industry-inspired projects that reinforce your learning and prepare you for real-world VLSI challenges.
- Practical Debugging Challenge
- Apply your knowledge in a debugging challenge, identifying and fixing design bugs just like a real verification engineer.
This course is designed to equip you with both theoretical knowledge and practical expertise, bridging the gap between academia and the VLSI industry.
Who should take Digital Design and Verification course?
- Engineering students from Circuit branches such ECE, EEE, CSE, IT, E&I, Mechatronics
Curriculum
- Introduction to Chips: Defines chips, signals, digitization, and basic digital circuits using transistors.
- Chip Evolution: Traces the historical development of chip technology from 1980s to the present.
- Chip Fundamentals: Explores the chip-making process, FPGA alternatives, and the importance of chips in digital systems.
- Chip I/O and Protocols: Covers input/output pins, standard protocols, and chip categories.
- Binary System and Arithmetic: Explains binary representation, negative numbers, fractional values, and binary arithmetic.
- Logic Gates and Optimization: Introduces logic gates, boolean algebra, and optimization techniques for digital circuits.
- Circuit Types: Differentiates between combinational and sequential circuits, including flip-flops and timing considerations.
- Hardware Description Language (HDL): Introduces Verilog constructs, coding styles, and verification techniques.
- Digital Design: Covers digital design principles, including adders, traffic controllers, finite state machines, and pipelining.
- Verification: Details the stages of chip verification, functional verification methodologies, testbench development, debugging, and coverage closure.
Tools you will learn in Digital Design and Verification course
- Skills : Digital Design, Design Verification, HDL constructs, HDL Design Flow and synthesis, Testbench coding.